YaelLogic 338074c383 sycl: add RMS_NORM_BACK operation support (#16808) ... * sycl: add RMS_NORM_BACK operation support * sycl: rms_norm_back: add dual reduction paths (FP64 and FP32) and savepoint before further changes * sycl: add RMS_NORM_BACK support Implement RMS_NORM_BACK for the SYCL backend using FP32 compensated parallel reduction. Minimal docs updates (ops.md / SYCL.csv). * revert: restore .gitignore and tools/run/CMakeLists.txt to upstream * revert: restore tests/CMakeLists.txt to upstream * sycl: optimize rms_norm_back * fix: restore SYCL.csv to correct state with RMS_NORM_BACK support * Update ggml/src/ggml-sycl/norm.cpp Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com> * fix: remove trailing whitespace and add missing newline (EditorConfig) --------- Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>		2025-10-29 14:14:39 +08:00
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BLAS.csv	ops : update BLAS (#14914)	2025-07-28 10:01:03 +02:00
CANN.csv	CANN: update ops docs (#14935)	2025-07-30 08:39:24 +08:00
CPU.csv	cpu : add FLOOR, CEIL, ROUND and TRUNC unary operators (#16083)	2025-10-15 21:24:51 +02:00
CUDA.csv	Docs: add instructions for adding backends (#14889)	2025-07-27 09:36:43 +08:00
Metal.csv	ops : update BLAS (#14914)	2025-07-28 10:01:03 +02:00
OpenCL.csv	opencl : add ops docs (#14910)	2025-07-28 18:50:17 +02:00
SYCL.csv	sycl: add RMS_NORM_BACK operation support (#16808)	2025-10-29 14:14:39 +08:00
Vulkan.csv	SYCL: Add support for FLOOR,CEIL,ROUND and TRUNC unary operators (#16613)	2025-10-20 11:08:32 +03:00
zDNN.csv	ggml-zdnn: fix #15414, activate FP16 and BF16 acceleration and incorrect zTensor free (#15839)	2025-09-13 02:39:52 +08:00