Remove fastdiv_s64, as we can treat neqk1 and rq3 as uint32_t
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0211798e56
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@ -821,91 +821,6 @@ __device__ __forceinline__ uint8_t ggml_cuda_float_to_fp4_e2m1(float x, float e)
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return static_cast<uint8_t>(best_i | sign_bit);
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}
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struct fastdiv_consts_s64 {
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int64_t mp; // magic number
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int64_t d; // divisor
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uint8_t L; // need at most 6 bits to represent L, use 7th bit to signal sign of d
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};
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static inline uint8_t floor_log2(uint64_t x) {
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uint64_t exp;
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#if defined(__GNUC__) || defined(__clang__)
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exp = 63 - __builtin_clzll(x);
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#elif defined(_MSC_VER)
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// MSVC: _BitScanReverse64 finds the index of the MSB (0 to 63)
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_BitScanReverse64(&exp, x);
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#endif
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return exp;
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}
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// Helper: Safely computes floor(2^{64 + l} * (1 + fraction) / d)
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static uint64_t compute_m(uint64_t d, int l, int prec) {
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// 1. Calculate q and r such that: 2^64 = (q * d) + r
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// Since 2^64 overflows uint64_t, we use 0xFF...FF and adjust.
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uint64_t q = (0xFFFFFFFFFFFFFFFF / d);
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uint64_t r = (0xFFFFFFFFFFFFFFFF % d) + 1;
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if (r >= d) {
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r -= d;
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q++;
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}
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// 2. We need (2^l * 2^64) / d => (2^l * q) + (2^l * r) / d
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uint64_t base_q = (q << l);
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uint64_t base_r = (r << l) / d;
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uint64_t m = base_q + base_r;
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// 3. For m_high, we need to add the precision term: (2^{64 + l - prec}) / d
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// (2^{64 + l - prec}) / d => (2^{64} / d) >> (prec - l)
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// This is safe because (prec - l) >= 0 in this algorithm
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uint64_t extra = (q >> (prec - l)) + ((r >> (prec - l)) / d);
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m += extra;
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return m;
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}
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static const fastdiv_consts_s64 init_fastdiv_s64(int64_t d) {
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GGML_ASSERT(d != 0);
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uint64_t abs_d = d < 0 ? -d : d;
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uint8_t L = floor_log2(abs_d);
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if (uint64_t{ 1 } << L == abs_d) {
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// signal negative divisor in L's 7th bit
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d < 0 ? L |= 0x40 : 0;
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// multiply with 0 to avoid branching in fastdiv_s64 kernel when d is power of 2
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return { 0, d, L };
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}
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uint64_t mh = compute_m(abs_d, L, 63);
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// signal negative divisor in L's 7th bit
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d < 0 ? L |= 0x40 : 0;
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return { (int64_t) mh, d, L };
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}
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static __device__ int64_t fastdiv_s64(int64_t n, fastdiv_consts_s64 c) {
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int64_t q;
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q = __mul64hi(n, c.mp);
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q += n;
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// Extract the sign bit
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uint64_t q_sign = q >> 63;
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// L's lower 6 bits are the shift amount
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uint8_t shift = c.L & 0x3F;
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q += q_sign & ((1ULL << shift) - (c.mp == 0));
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q >>= shift;
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// if divisor is negative, negate the quotient
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int64_t d_sign = c.L >> 6;
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d_sign ? q = -q : 0;
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return q;
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}
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__device__ __forceinline__ int64_t fastmodulo_s64(int64_t n, fastdiv_consts_s64 c) {
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int64_t q = fastdiv_s64(n, c);
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return n - (q * c.d);
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}
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// See https://gmplib.org/~tege/divcnst-pldi94.pdf figure 4.1.
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// Precompute mp (m' in the paper) and L such that division
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// can be computed using a multiply (high 32b of 64b result)
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@ -1,36 +1,36 @@
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#include "gated_delta_net.cuh"
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template <int S_v, bool KDA>
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__global__ void gated_delta_net_cuda(const float * q,
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const float * k,
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const float * v,
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const float * g,
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const float * beta,
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const float * curr_state,
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float * dst,
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int64_t H,
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int64_t n_tokens,
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int64_t n_seqs,
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int64_t sq1,
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int64_t sq2,
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int64_t sq3,
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int64_t sv1,
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int64_t sv2,
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int64_t sv3,
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int64_t sb1,
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int64_t sb2,
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int64_t sb3,
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const fastdiv_consts_s64 neqk1_magic,
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const fastdiv_consts_s64 rq3_magic,
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float scale) {
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const int64_t h_idx = blockIdx.x;
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const int64_t sequence = blockIdx.y;
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__global__ void gated_delta_net_cuda(const float * q,
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const float * k,
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const float * v,
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const float * g,
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const float * beta,
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const float * curr_state,
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float * dst,
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int64_t H,
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int64_t n_tokens,
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int64_t n_seqs,
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int64_t sq1,
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int64_t sq2,
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int64_t sq3,
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int64_t sv1,
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int64_t sv2,
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int64_t sv3,
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int64_t sb1,
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int64_t sb2,
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int64_t sb3,
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const uint3 neqk1_magic,
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const uint3 rq3_magic,
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float scale) {
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const uint32_t h_idx = blockIdx.x;
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const uint32_t sequence = blockIdx.y;
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// each warp owns one column, using warp-level primitives to reduce across rows
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const int lane = threadIdx.x;
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const int col = blockIdx.z * blockDim.y + threadIdx.y;
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const int lane = threadIdx.x;
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const int col = blockIdx.z * blockDim.y + threadIdx.y;
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const int64_t iq1 = fastmodulo_s64(h_idx, neqk1_magic);
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const int64_t iq3 = fastdiv_s64(sequence, rq3_magic);
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const uint32_t iq1 = fastmodulo(h_idx, neqk1_magic);
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const uint32_t iq3 = fastdiv(sequence, rq3_magic);
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const int64_t attn_score_elems = S_v * H * n_tokens * n_seqs;
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float * attn_data = dst;
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@ -151,8 +151,8 @@ static void launch_gated_delta_net(
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dim3 grid_dims(H, n_seqs, (S_v + num_warps - 1) / num_warps);
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dim3 block_dims(warp_size <= S_v ? warp_size : S_v, num_warps, 1);
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const fastdiv_consts_s64 neqk1_magic = init_fastdiv_s64(neqk1);
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const fastdiv_consts_s64 rq3_magic = init_fastdiv_s64(rq3);
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const uint3 neqk1_magic = init_fastdiv_values(neqk1);
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const uint3 rq3_magic = init_fastdiv_values(rq3);
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switch (S_v) {
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case 16:
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