ggml-cpu: add rvv vec_dot for iq1_s, iq1_m
Co-authored-by: Rehan Qasim <rehan.qasim@10xengineers.ai>
This commit is contained in:
taimur-10x
parent
e68fd6064e
commit
b582ec427d
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@ -149,8 +149,6 @@
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#define ggml_vec_dot_iq2_xxs_q8_K_generic ggml_vec_dot_iq2_xxs_q8_K
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#define ggml_vec_dot_iq2_xs_q8_K_generic ggml_vec_dot_iq2_xs_q8_K
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#define ggml_vec_dot_iq3_xxs_q8_K_generic ggml_vec_dot_iq3_xxs_q8_K
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#define ggml_vec_dot_iq1_s_q8_K_generic ggml_vec_dot_iq1_s_q8_K
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#define ggml_vec_dot_iq1_m_q8_K_generic ggml_vec_dot_iq1_m_q8_K
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#define ggml_vec_dot_iq4_nl_q8_0_generic ggml_vec_dot_iq4_nl_q8_0
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#define ggml_vec_dot_iq4_xs_q8_K_generic ggml_vec_dot_iq4_xs_q8_K
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#define ggml_vec_dot_mxfp4_q8_0_generic ggml_vec_dot_mxfp4_q8_0
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@ -2232,13 +2232,13 @@ void ggml_vec_dot_iq3_s_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const vo
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v_qh_val = __riscv_vsll_vx_u16m1(v_qh_val, 10, 16);
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vuint16m1_t v_grid_offsets = __riscv_vor_vv_u16m1(v_qs_u16, v_qh_val, 16);
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//grid value is 4xuint8
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// Grid value is 4xuint8
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vuint32m2_t v_grid_packed = __riscv_vluxei16_v_u32m2((const uint32_t *)grid64, v_grid_offsets, 16);
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vuint8m2_t v_grid_u8 = __riscv_vreinterpret_v_u32m2_u8m2(v_grid_packed);
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vuint8mf4_t v_signs_raw = __riscv_vle8_v_u8mf4(signs, 8);
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signs += 8;
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// generate sign Mask
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// Generate sign mask
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vuint8m2_t v_signs_source = __riscv_vlmul_ext_v_u8mf4_u8m2(v_signs_raw);
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vuint8m2_t v_signs_bcast = __riscv_vrgather_vv_u8m2(v_signs_source, v_sign_gather_indices, 64);
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vuint8m2_t v_sign_bits = __riscv_vand_vv_u8m2(v_signs_bcast, v_sign_masks, 64);
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@ -2259,7 +2259,7 @@ void ggml_vec_dot_iq3_s_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const vo
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int32_t s_lo = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(v_dot_lo, v_zero, 32));
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int32_t s_hi = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(v_dot_hi, v_zero, 32));
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// Apply sub Scales
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// Apply sub-scales
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uint8_t sc_byte = *scales++;
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int sc_lo = (sc_byte & 0xF) * 2 + 1;
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int sc_hi = (sc_byte >> 4) * 2 + 1;
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@ -2363,7 +2363,7 @@ void ggml_vec_dot_tq1_0_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const vo
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const int vl = 16;
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vuint8mf2_t tq = __riscv_vreinterpret_v_u32mf2_u8mf2(__riscv_vmv_v_x_u32mf2((uint32_t)qh, vl / 4));
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vuint8mf2_t tq = __riscv_vreinterpret_v_u32mf2_u8mf2(__riscv_vmv_v_x_u32mf2(*(uint32_t*)(&qh[0]), vl / 4));
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vuint8mf2_t p = __riscv_vle8_v_u8mf2(pow, vl);
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vuint16m1_t tq0 = __riscv_vsrl_vx_u16m1(__riscv_vwmulu_vx_u16m1(__riscv_vmul_vv_u8mf2(tq, p, vl), 3, vl), 8, vl);
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@ -2472,3 +2472,223 @@ void ggml_vec_dot_tq2_0_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const vo
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#endif // __riscv_vector
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}
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void ggml_vec_dot_iq1_s_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const void * GGML_RESTRICT vx, size_t bx, const void * GGML_RESTRICT vy, size_t by, int nrc) {
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assert(n % QK_K == 0);
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assert(nrc == 1);
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UNUSED(nrc);
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UNUSED(bx);
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UNUSED(by);
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UNUSED(bs);
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const block_iq1_s * GGML_RESTRICT x = vx;
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const block_q8_K * GGML_RESTRICT y = vy;
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const int nb = n / QK_K;
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#if defined __riscv_v_intrinsic
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float sumf = 0;
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for (int i = 0; i < nb; ++i) {
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// Load qh once for the entire superblock.
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vuint16mf2_t qh = __riscv_vle16_v_u16mf2(x[i].qh, 8);
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// Calculate ls.
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vuint16mf2_t temp = __riscv_vsrl_vx_u16mf2(qh, 12, 8);
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temp = __riscv_vand_vx_u16mf2(temp, 7, 8);
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vint32m1_t ls = __riscv_vreinterpret_v_u32m1_i32m1(__riscv_vwmulu_vx_u32m1(temp, 2, 8));
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ls = __riscv_vadd_vx_i32m1(ls, 1, 8);
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// Calculate delta.
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vbool32_t mask = __riscv_vmseq_vx_u16mf2_b32(__riscv_vand_vx_u16mf2(qh, 0x8000, 8), 0, 8);
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vint32m1_t delta_neg = __riscv_vmv_v_x_i32m1(-1, 8);
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vint32m1_t delta_pos = __riscv_vmv_v_x_i32m1(1, 8);
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vint32m1_t delta = __riscv_vmerge_vvm_i32m1(delta_neg, delta_pos, mask, 8);
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// Load qs.
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vuint8m1_t qs = __riscv_vle8_v_u8m1(x[i].qs, 32);
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// Prepare the indices.
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const uint64_t shift = 0x0009000600030000;
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vuint16m2_t qh_shift = __riscv_vreinterpret_v_u64m2_u16m2(__riscv_vmv_v_x_u64m2(shift, 8));
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vuint16m2_t qh_gather_index = __riscv_vreinterpret_v_i16m2_u16m2(
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__riscv_vdiv_vx_i16m2(__riscv_vreinterpret_v_u16m2_i16m2(__riscv_vid_v_u16m2(32)), 4, 32));
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vuint16m2_t qh_ext = __riscv_vlmul_ext_v_u16m1_u16m2(__riscv_vlmul_ext_v_u16mf2_u16m1(qh));
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vuint16m2_t qh_index = __riscv_vrgather_vv_u16m2(qh_ext, qh_gather_index, 32);
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qh_index = __riscv_vsrl_vv_u16m2(qh_index, qh_shift, 32);
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qh_index = __riscv_vand_vx_u16m2(qh_index, 7, 32);
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qh_index = __riscv_vsll_vx_u16m2(qh_index, 8, 32);
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qh_index = __riscv_vor_vv_u16m2(qh_index, __riscv_vzext_vf2_u16m2(qs, 32), 32);
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vuint16m2_t index = __riscv_vsll_vx_u16m2(qh_index, 3, 32);
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// Final lsums.
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int32_t lsums_s[8];
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vint32m1_t one_scalar = __riscv_vmv_v_x_i32m1(0, 1);
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// Sub-blocks 1-4
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{
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vuint16m1_t grid_index0 = __riscv_vget_v_u16m2_u16m1(index, 0);
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vint8m4_t grid0 = __riscv_vreinterpret_v_i64m4_i8m4(__riscv_vluxei16_v_i64m4((const int64_t*)iq1s_grid, grid_index0, 16));
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vint8m4_t q80 = __riscv_vle8_v_i8m4(y[i].qs, 128);
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vint16m8_t lsum0 = __riscv_vwmul_vv_i16m8(grid0, q80, 128);
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lsums_s[0] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum0, 0), one_scalar, 32));
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lsums_s[1] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum0, 1), one_scalar, 32));
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lsums_s[2] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum0, 2), one_scalar, 32));
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lsums_s[3] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum0, 3), one_scalar, 32));
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}
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__asm__ __volatile__("" ::: "memory");
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// Sub-blocks 5-8
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{
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vuint16m1_t grid_index1 = __riscv_vget_v_u16m2_u16m1(index, 1);
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vint8m4_t grid1 = __riscv_vreinterpret_v_i64m4_i8m4(__riscv_vluxei16_v_i64m4((const int64_t*)iq1s_grid, grid_index1, 16));
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vint8m4_t q81 = __riscv_vle8_v_i8m4(&y[i].qs[128], 128);
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vint16m8_t lsum1 = __riscv_vwmul_vv_i16m8(grid1, q81, 128);
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lsums_s[4] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum1, 0), one_scalar, 32));
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lsums_s[5] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum1, 1), one_scalar, 32));
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lsums_s[6] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum1, 2), one_scalar, 32));
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lsums_s[7] = __riscv_vmv_x_s_i32m1_i32(__riscv_vwredsum_vs_i16m2_i32m1(__riscv_vget_v_i16m8_i16m2(lsum1, 3), one_scalar, 32));
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}
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__asm__ __volatile__("" ::: "memory");
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vint32m1_t lsums = __riscv_vle32_v_i32m1(&lsums_s[0], 8);
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// Calculate the bsums.
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vint16m1_t bsums_0 = __riscv_vle16_v_i16m1(y[i].bsums, 16);
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const vuint32m1_t bsums_i32 = __riscv_vreinterpret_v_u16m1_u32m1(__riscv_vreinterpret_v_i16m1_u16m1(bsums_0));
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const vint16mf2_t bsums_i32_0 = __riscv_vreinterpret_v_u16mf2_i16mf2(__riscv_vnsrl_wx_u16mf2(bsums_i32, 0, 8));
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const vint16mf2_t bsums_i32_1 = __riscv_vreinterpret_v_u16mf2_i16mf2(__riscv_vnsrl_wx_u16mf2(bsums_i32, 16, 8));
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const vint32m1_t bsums = __riscv_vwadd_vv_i32m1(bsums_i32_0, bsums_i32_1, 8);
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// Accumulation.
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vint32m1_t sumi_v = __riscv_vmul_vv_i32m1(ls, lsums, 8);
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vint32m1_t sumi1_v = __riscv_vmul_vv_i32m1(__riscv_vmul_vv_i32m1(ls, delta, 8), bsums, 8);
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// Update sumf.
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int sumi = __riscv_vmv_x_s_i32m1_i32(__riscv_vredsum_vs_i32m1_i32m1(sumi_v, __riscv_vmv_v_x_i32m1(0.0f, 1), 8));
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int sumi1 = __riscv_vmv_x_s_i32m1_i32(__riscv_vredsum_vs_i32m1_i32m1(sumi1_v, __riscv_vmv_v_x_i32m1(0.0f, 1), 8));
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sumf += GGML_CPU_FP16_TO_FP32(x[i].d) * y[i].d * (sumi + IQ1S_DELTA * sumi1);
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}
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*s = sumf;
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#else
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UNUSED(x);
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UNUSED(y);
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UNUSED(nb);
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ggml_vec_dot_iq1_s_q8_K_generic(n, s, bs, vx, bx, vy, by, nrc);
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#endif
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}
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void ggml_vec_dot_iq1_m_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const void * GGML_RESTRICT vx, size_t bx, const void * GGML_RESTRICT vy, size_t by, int nrc) {
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assert(n % QK_K == 0);
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assert(nrc == 1);
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UNUSED(nrc);
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UNUSED(bx);
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UNUSED(by);
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UNUSED(bs);
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const block_iq1_m * GGML_RESTRICT x = vx;
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const block_q8_K * GGML_RESTRICT y = vy;
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const int nb = n / QK_K;
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#if defined __riscv_v_intrinsic
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iq1m_scale_t scale;
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float sumf = 0.0f;
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for (int i = 0; i < nb; ++i) {
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const int8_t * q8 = y[i].qs;
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const uint8_t * qs = x[i].qs;
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const uint8_t * qh = x[i].qh;
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const uint16_t * sc = (const uint16_t *)x[i].scales;
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scale.u16 = (sc[0] >> 12) | ((sc[1] >> 8) & 0x00f0) | ((sc[2] >> 4) & 0x0f00) | (sc[3] & 0xf000);
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// Accumulators.
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vint32m2_t acc1 = __riscv_vmv_v_x_i32m2(0, 16);
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vint32m2_t acc2 = __riscv_vmv_v_x_i32m2(0, 16);
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// We process 4 sub-blocks together.
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for (int ib = 0; ib < QK_K/128; ib++) {
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// Load qh for 4 sub-blocks.
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const vuint8mf4_t qh_8 = __riscv_vle8_v_u8mf4(qh, 8);
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const vuint16mf2_t qh_16_lo = __riscv_vzext_vf2_u16mf2(qh_8, 8);
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const vuint16mf2_t qh_16_hi = __riscv_vsll_vx_u16mf2(qh_16_lo, 8, 8);
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const vuint16m1_t qhb = __riscv_vzext_vf2_u16m1(
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__riscv_vreinterpret_v_u16mf2_u8mf2(__riscv_vor_vv_u16mf2(qh_16_lo, qh_16_hi, 8)), 16);
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qh += 8;
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// Prepare grid indices.
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const vuint16m1_t qsb = __riscv_vzext_vf2_u16m1(__riscv_vle8_v_u8mf2(&qs[0], 16), 16);
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const vuint16m1_t shift = __riscv_vreinterpret_v_u32m1_u16m1(__riscv_vmv_v_x_u32m1(0x00040008, 8));
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vuint16m1_t index = __riscv_vor_vv_u16m1(qsb, __riscv_vand_vx_u16m1(__riscv_vsll_vv_u16m1(qhb, shift, 16), 0x700, 16), 16);
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index = __riscv_vsll_vx_u16m1(index, 3, 16);
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qs += 16;
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// Load the grid.
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const vint8m4_t iq1b = __riscv_vreinterpret_v_i64m4_i8m4(__riscv_vreinterpret_v_u64m4_i64m4(
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__riscv_vluxei16_v_u64m4(iq1s_grid, index, 16)));
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// Prepare the deltas.
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const vbool16_t mask = __riscv_vmsgtu_vx_u16m1_b16(
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__riscv_vand_vv_u16m1(qhb, __riscv_vreinterpret_v_u32m1_u16m1(__riscv_vmv_v_x_u32m1(0x00800008, 8)), 16), 0, 16);
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const vint64m4_t delta_pos = __riscv_vmv_v_x_i64m4(0x0101010101010101, 16);
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const vint64m4_t delta_neg = __riscv_vmv_v_x_i64m4(0xffffffffffffffff, 16);
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const vint8m4_t delta = __riscv_vreinterpret_v_i64m4_i8m4(
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__riscv_vmerge_vvm_i64m4(delta_pos, delta_neg, mask, 16));
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// Load q8 for sub-blocks.
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const vint8m4_t q8b = __riscv_vle8_v_i8m4(q8, 128);
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q8 += 128;
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// Calculate the lsums.
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const vint16m8_t lsum1 = __riscv_vwmul_vv_i16m8(iq1b, q8b, 128);
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const vint16m8_t lsum2 = __riscv_vwmul_vv_i16m8(delta, q8b, 128);
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// Prepare the scales.
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const int16_t ls_0_0 = 2*((sc[0] >> 0) & 0x7) + 1;
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const int16_t ls_0_1 = 2*((sc[0] >> 3) & 0x7) + 1;
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const int16_t ls_1_0 = 2*((sc[0] >> 6) & 0x7) + 1;
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const int16_t ls_1_1 = 2*((sc[0] >> 9) & 0x7) + 1;
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const int16_t ls_2_0 = 2*((sc[1] >> 0) & 0x7) + 1;
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const int16_t ls_2_1 = 2*((sc[1] >> 3) & 0x7) + 1;
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const int16_t ls_3_0 = 2*((sc[1] >> 6) & 0x7) + 1;
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const int16_t ls_3_1 = 2*((sc[1] >> 9) & 0x7) + 1;
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sc += 2;
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// Accumulate in acc0 and acc1 for each sub-block.
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acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_0_0, __riscv_vget_v_i16m8_i16m1(lsum1, 0), 16);
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acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_0_1, __riscv_vget_v_i16m8_i16m1(lsum1, 1), 16);
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acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_0_0, __riscv_vget_v_i16m8_i16m1(lsum2, 0), 16);
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acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_0_1, __riscv_vget_v_i16m8_i16m1(lsum2, 1), 16);
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//
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acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_1_0, __riscv_vget_v_i16m8_i16m1(lsum1, 2), 16);
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acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_1_1, __riscv_vget_v_i16m8_i16m1(lsum1, 3), 16);
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acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_1_0, __riscv_vget_v_i16m8_i16m1(lsum2, 2), 16);
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acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_1_1, __riscv_vget_v_i16m8_i16m1(lsum2, 3), 16);
|
||||
//
|
||||
acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_2_0, __riscv_vget_v_i16m8_i16m1(lsum1, 4), 16);
|
||||
acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_2_1, __riscv_vget_v_i16m8_i16m1(lsum1, 5), 16);
|
||||
acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_2_0, __riscv_vget_v_i16m8_i16m1(lsum2, 4), 16);
|
||||
acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_2_1, __riscv_vget_v_i16m8_i16m1(lsum2, 5), 16);
|
||||
//
|
||||
acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_3_0, __riscv_vget_v_i16m8_i16m1(lsum1, 6), 16);
|
||||
acc1 = __riscv_vwmacc_vx_i32m2(acc1, ls_3_1, __riscv_vget_v_i16m8_i16m1(lsum1, 7), 16);
|
||||
acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_3_0, __riscv_vget_v_i16m8_i16m1(lsum2, 6), 16);
|
||||
acc2 = __riscv_vwmacc_vx_i32m2(acc2, ls_3_1, __riscv_vget_v_i16m8_i16m1(lsum2, 7), 16);
|
||||
}
|
||||
|
||||
// Reduce and accumulate in `sumf`.
|
||||
vint32m1_t one = __riscv_vmv_v_x_i32m1(0, 1);
|
||||
int sumi1 = __riscv_vmv_x_s_i32m1_i32(__riscv_vredsum_vs_i32m2_i32m1(acc1, one, 16));
|
||||
int sumi2 = __riscv_vmv_x_s_i32m1_i32(__riscv_vredsum_vs_i32m2_i32m1(acc2, one, 16));
|
||||
sumf += y[i].d * GGML_CPU_FP16_TO_FP32(scale.f16) * (sumi1 + IQ1M_DELTA * sumi2);
|
||||
}
|
||||
|
||||
*s = sumf;
|
||||
|
||||
#else
|
||||
UNUSED(x);
|
||||
UNUSED(y);
|
||||
UNUSED(nb);
|
||||
|
||||
ggml_vec_dot_iq1_m_q8_K_generic(n, s, bs, vx, bx, vy, by, nrc);
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue