cmake: Added more x86_64 CPU backends when building with `GGML_CPU_ALL_VARIANTS=On` (#18186)
* minor: Consolidated `#include <immintrin.h>` under `ggml-cpu-impl.h` * cmake: Added more x86-64 CPU backends when building with `GGML_CPU_ALL_VARIANTS=On` - `ivybridge` - `piledriver` - `cannonlake` - `cascadelake` - `cooperlake` - `zen4` Resolves: #17966
This commit is contained in:
Boian Berberov
GitHub
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4fd59e8427
commit
94de74e7b1
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@ -430,10 +430,22 @@ if (MSVC)
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configure_msvc_target(ggml-cpu-x64)
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configure_msvc_target(ggml-cpu-sse42)
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configure_msvc_target(ggml-cpu-sandybridge)
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# __FMA__ and __F16C__ are not defined in MSVC, however they are implied with AVX2/AVX512
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# skipping ggml-cpu-ivybridge
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# skipping ggml-cpu-piledriver
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configure_msvc_target(ggml-cpu-haswell)
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configure_msvc_target(ggml-cpu-skylakex)
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configure_msvc_target(ggml-cpu-cannonlake)
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configure_msvc_target(ggml-cpu-cascadelake)
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configure_msvc_target(ggml-cpu-icelake)
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# MSVC 2022 doesn't support BF16 intrinsics without `/arch:AVX10.1` ?!
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# https://learn.microsoft.com/en-us/cpp/intrinsics/x64-amd64-intrinsics-list?view=msvc-170
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# https://learn.microsoft.com/en-us/cpp/build/reference/arch-x64?view=msvc-170
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# skipping ggml-cpu-cooperlake
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# skipping ggml-cpu-zen4
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configure_msvc_target(ggml-cpu-alderlake)
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# MSVC doesn't support AMX
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# skipping ggml-cpu-sapphirerapids
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if (GGML_BUILD_EXAMPLES)
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configure_msvc_target(common-ggml)
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@ -357,15 +357,29 @@ if (GGML_CPU_ALL_VARIANTS)
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endif()
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if (GGML_SYSTEM_ARCH STREQUAL "x86")
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ggml_add_cpu_backend_variant(x64)
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ggml_add_cpu_backend_variant(sse42 SSE42)
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ggml_add_cpu_backend_variant(sandybridge SSE42 AVX)
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ggml_add_cpu_backend_variant(haswell SSE42 AVX F16C AVX2 BMI2 FMA)
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ggml_add_cpu_backend_variant(skylakex SSE42 AVX F16C AVX2 BMI2 FMA AVX512)
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ggml_add_cpu_backend_variant(icelake SSE42 AVX F16C AVX2 BMI2 FMA AVX512 AVX512_VBMI AVX512_VNNI)
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ggml_add_cpu_backend_variant(alderlake SSE42 AVX F16C AVX2 BMI2 FMA AVX_VNNI)
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ggml_add_cpu_backend_variant(sse42 SSE42)
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ggml_add_cpu_backend_variant(sandybridge SSE42 AVX)
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if (NOT MSVC)
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# __FMA__ and __F16C__ are not defined in MSVC, however they are implied with AVX2/AVX512
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ggml_add_cpu_backend_variant(ivybridge SSE42 AVX F16C)
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ggml_add_cpu_backend_variant(piledriver SSE42 AVX F16C FMA)
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endif()
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ggml_add_cpu_backend_variant(haswell SSE42 AVX F16C FMA AVX2 BMI2)
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ggml_add_cpu_backend_variant(skylakex SSE42 AVX F16C FMA AVX2 BMI2 AVX512)
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ggml_add_cpu_backend_variant(cannonlake SSE42 AVX F16C FMA AVX2 BMI2 AVX512 AVX512_VBMI)
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ggml_add_cpu_backend_variant(cascadelake SSE42 AVX F16C FMA AVX2 BMI2 AVX512 AVX512_VNNI)
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ggml_add_cpu_backend_variant(icelake SSE42 AVX F16C FMA AVX2 BMI2 AVX512 AVX512_VBMI AVX512_VNNI)
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if (NOT MSVC)
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# MSVC 2022 doesn't support BF16 intrinsics without `/arch:AVX10.1` ?!
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# https://learn.microsoft.com/en-us/cpp/intrinsics/x64-amd64-intrinsics-list?view=msvc-170
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# https://learn.microsoft.com/en-us/cpp/build/reference/arch-x64?view=msvc-170
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ggml_add_cpu_backend_variant(cooperlake SSE42 AVX F16C FMA AVX2 BMI2 AVX512 AVX512_VNNI AVX512_BF16)
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ggml_add_cpu_backend_variant(zen4 SSE42 AVX F16C FMA AVX2 BMI2 AVX512 AVX512_VBMI AVX512_VNNI AVX512_BF16)
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endif()
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ggml_add_cpu_backend_variant(alderlake SSE42 AVX F16C FMA AVX2 BMI2 AVX_VNNI)
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if (NOT MSVC)
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# MSVC doesn't support AMX
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ggml_add_cpu_backend_variant(sapphirerapids SSE42 AVX F16C AVX2 BMI2 FMA AVX512 AVX512_VBMI AVX512_VNNI AVX512_BF16 AMX_TILE AMX_INT8)
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ggml_add_cpu_backend_variant(sapphirerapids SSE42 AVX F16C FMA AVX2 BMI2 AVX512 AVX512_VBMI AVX512_VNNI AVX512_BF16 AMX_TILE AMX_INT8)
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endif()
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elseif(GGML_SYSTEM_ARCH STREQUAL "ARM")
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if (CMAKE_SYSTEM_NAME MATCHES "Linux")
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@ -328,7 +328,7 @@ inline static int32x4_t ggml_vdotq_s32(int32x4_t acc, int8x16_t a, int8x16_t b)
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#if defined(_MSC_VER) || defined(__MINGW32__)
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#include <intrin.h>
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#elif defined(__AVX__) || defined(__AVX2__) || defined(__AVX512F__) || defined(__SSSE3__) || defined(__SSE3__) || defined(__SSE__)
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#elif defined(__SSE__) || defined(__SSE3__) || defined(__SSSE3__) || defined(__AVX__) || defined(__F16C__) || defined(__AVX2__) || defined(__AVX512F__) || defined(__AVX512BF16__)
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#include <immintrin.h>
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#endif
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@ -14,10 +14,6 @@
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#include <arm_neon.h>
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#endif
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#if defined(__F16C__)
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#include <immintrin.h>
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#endif
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#if defined(__riscv_v_intrinsic)
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#include <riscv_vector.h>
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#endif
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@ -24,10 +24,6 @@
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#include <arm_neon.h>
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#endif
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#if defined(__F16C__)
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#include <immintrin.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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