Merge 4515987c95 into 05fa625eac
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3adb7e4e8f
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@ -2369,6 +2369,22 @@ static const int8_t keven_signs_q2xs[1024] = {
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};
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#endif
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#if defined(__AVX2__)
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// shifts to 7 bit signs in xxs quantizations
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static const uint32_t ksigns_shift_xxs[4] = {0, 7, 14, 21};
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// for _mm256_shuffle_epi8, has 0x80 at indices that are encoded with odd bit counts
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static const uint32_t ksigns_popc_odd[4] = {0x00808000, 0x80000080, 0x80000080, 0x00808000,};
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// for _mm256_shuffle_epi8, broadcasts bytes 0, 2, 4, 6 / 8, 10, 12, 14
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static const uint64_t ksigns_bcast_1[4] = {
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0x0000000000000000ULL, 0x0202020202020202ULL,
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0x0404040404040404ULL, 0x0606060606060606ULL,
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};
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static const uint64_t ksigns_bcast_2[4] = {
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0x0808080808080808ULL, 0x0A0A0A0A0A0A0A0AULL,
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0x0C0C0C0C0C0C0C0CULL, 0x0E0E0E0E0E0E0E0EULL,
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};
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#endif
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void ggml_vec_dot_iq2_xxs_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const void * GGML_RESTRICT vx, size_t bx, const void * GGML_RESTRICT vy, size_t by, int nrc) {
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assert(n % QK_K == 0);
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assert(nrc == 1);
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@ -2384,11 +2400,16 @@ void ggml_vec_dot_iq2_xxs_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const
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#if defined(__AVX2__)
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const uint64_t * signs64 = (const uint64_t *)keven_signs_q2xs;
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uint32_t aux32[4];
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const uint8_t * aux8 = (const uint8_t *)aux32;
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const __m128i ks_shift = _mm_loadu_si128((const __m128i *)ksigns_shift_xxs);
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const __m128i ks_mask = _mm_set1_epi32(0x7F);
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const __m128i popc_odd = _mm_loadu_si128((const __m128i *)ksigns_popc_odd);
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const __m256i ks_bc_1 = _mm256_loadu_si256((const __m256i *)ksigns_bcast_1);
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const __m256i ks_bc_2 = _mm256_loadu_si256((const __m256i *)ksigns_bcast_2);
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const __m256i ks_bsel = _mm256_set1_epi64x(0x8040201008040201LL);
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__m256 accumf = _mm256_setzero_ps();
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for (int i = 0; i < nb; ++i) {
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const float d = GGML_CPU_FP16_TO_FP32(x[i].d) * y[i].d;
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@ -2402,12 +2423,29 @@ void ggml_vec_dot_iq2_xxs_q8_K(int n, float * GGML_RESTRICT s, size_t bs, const
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memcpy(aux32, q2, 4*sizeof(uint32_t)); q2 += 8;
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const __m256i q2_1 = _mm256_set_epi64x(iq2xxs_grid[aux8[ 3]], iq2xxs_grid[aux8[ 2]], iq2xxs_grid[aux8[1]], iq2xxs_grid[aux8[0]]);
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const __m256i q2_2 = _mm256_set_epi64x(iq2xxs_grid[aux8[11]], iq2xxs_grid[aux8[10]], iq2xxs_grid[aux8[9]], iq2xxs_grid[aux8[8]]);
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const __m256i s2_1 = _mm256_set_epi64x(signs64[(aux32[1] >> 21) & 127], signs64[(aux32[1] >> 14) & 127],
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signs64[(aux32[1] >> 7) & 127], signs64[(aux32[1] >> 0) & 127]);
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const __m256i s2_2 = _mm256_set_epi64x(signs64[(aux32[3] >> 21) & 127], signs64[(aux32[3] >> 14) & 127],
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signs64[(aux32[3] >> 7) & 127], signs64[(aux32[3] >> 0) & 127]);
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const __m256i q8s_1 = _mm256_sign_epi8(q8_1, s2_1);
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const __m256i q8s_2 = _mm256_sign_epi8(q8_2, s2_2);
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__m128i s_l = _mm_set1_epi32(aux32[1]);
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__m128i s_h = _mm_set1_epi32(aux32[3]);
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// shift each value to their offset, then zero out garbage
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s_l = _mm_srlv_epi32(s_l, ks_shift);
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s_h = _mm_srlv_epi32(s_h, ks_shift);
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s_l = _mm_and_si128(s_l, ks_mask);
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s_h = _mm_and_si128(s_h, ks_mask);
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// pack, count bits via xor+lut, correct bit 8
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__m128i signs_128 = _mm_packus_epi32(s_l, s_h);
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const __m128i cnt4 = _mm_xor_si128(_mm_srli_epi16(signs_128, 4), signs_128);
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const __m128i popc = _mm_shuffle_epi8(popc_odd, cnt4);
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signs_128 = _mm_or_si128(signs_128, popc);
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// expand to 256 bits, then broadcast to 8 bytes each
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__m256i signs_256 = _mm256_broadcastsi128_si256(signs_128);
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const __m256i s1_b = _mm256_shuffle_epi8(signs_256, ks_bc_1);
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const __m256i s2_b = _mm256_shuffle_epi8(signs_256, ks_bc_2);
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// set 0xFF in bytes that contain bit, then invert via xor+sub
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const __m256i s1 = _mm256_cmpeq_epi8(_mm256_and_si256(s1_b, ks_bsel), ks_bsel);
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const __m256i s2 = _mm256_cmpeq_epi8(_mm256_and_si256(s2_b, ks_bsel), ks_bsel);
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const __m256i q8s_1 = _mm256_sub_epi8(_mm256_xor_si256(q8_1, s1), s1);
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const __m256i q8s_2 = _mm256_sub_epi8(_mm256_xor_si256(q8_2, s2), s2);
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const __m256i dot1 = _mm256_maddubs_epi16(q2_1, q8s_1);
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const __m256i dot2 = _mm256_maddubs_epi16(q2_2, q8s_2);
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const uint16_t ls1 = aux32[1] >> 28;
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